README.TXT for TekExpress PCI Express Compliance solution Product: PCE6 (Specifications: Base-Tx-Test-Board, Base-SRIS-Tx-Test-Board) PCE5 (Specifications: CEM, Base-Tx-Test-Board, Base-SRIS-Tx-Test-Board, Ref-Clock, CXL) PCE4 (Specifications: CEM, Base-Tx-Test-Board, Base-SRIS-Tx-Test-Board, CXL) PCE3 (Specifications: CEM, U.2 (SFF-8639), M.2, Base-Tx-Test-Board, CXL) Version: v10.7.1 Date: July-2022 ================================================================================= Contents: 1. Introduction 1.1 Features 2. Before you click "RUN" 3. TekExpress PCI Express created changes on your system. 4. Supported Tests 5. Supported list of equipment and accessories 6. Switch Matrix 7. Known Limitations 7.1 Installer related limitation 7.2 TekExpress application related limitation 8. GRL PCE34 PHY Test Controller 8.1 How to detect GRL Controller on your Oscilloscope 8.2 GRL Controller for legacy Gen3 CBB fixture 8.3 GRL Controller for Gen4 CBB fixture 8.4 GRL Controller for Gen3 / Gen4 CLB fixture 8.5 Schematic update with GRL Controller ================================================================================= 1. Introduction The Tektronix TekExpress PCI Express is an automated test solution for testing the PCI Express compliance for Physical Layer Solution of PCI Express DUTs as per PCI Express Architecture PHY Test Base Specification Revision 6.0, Version 0.7 October 8, 2020). 1.1 Features Release (10.7.1) - Support for Gen6 PWJ measurements using PAMJET tool - Integration of Automated Scope noise characterization and compensation for Gen6. - Integration of CTLE optimization for Gen6 jitter measurements. - Support for Mini-Circuits RF Switch for Gen1-5 testing. - Improvement in Gen6 Preset Test feature. - Updated Gen6 Preset tests limits as per latest spec. - Support for Intel Clock Jitter Tool (CJT) for Ref Clock testing - Support for Sigtest Phoenix v5.1.0.4 for Gen5 CEM Signal and preset tests Release (10.7.0) - Support for PCIe Gen6 Base Spec TX Test (PAM4 Signaling) - Signal quality test using PAMJet and DPOJet analysis tools. - Preset test using Tektronix Preset Test Tool. - Support for Base Spec Gen6 signal validation using PAMJet tool. - Improved UI look and feel. - Improved autoset feature to display 9 divisions on scope and improving signal quality. Release (10.6.2) - Supports NI USB toggle tool for Gen4 DUTs. [Note: In order to detect the hardware and access it, the user will have to manually install the NI-DAQMX v20.7.1 software package in the Tekscope.] - Supports CXL Gen3, Gen4 and Gen5 device type for Add-In-Card/System-Board of CEM Specification and Tx Test Board/SRIS Test Board of Base specification. - Supports CSV report type. - Usability improvements for the automated deskew and attenuation. - Support for Gen4 and Gen5 dataclock pattern custom toggle index in non standard devices. - Support for Sigtest Phoenix v5.0.24 for Gen5 CEM. - Support for Skyworks clock jitter tool v7.0 for ref clk testing. Release (10.6.1) - Supports 33GHz scopes with TekConnect probes for Gen5 CEM analysis - Added new Gen5 CEM measurements 1. TIE RJ (RMS) Gen5 2. Uncorrelated PWJ DJ dd@E-12 Gen5 3. Uncorrelated PWJ TJ@E-12 Gen5 4. Uncorrelated TIE DJ dd@E-12 Gen5 5. Uncorrelated TIE TJ @ E-12 Gen5 - Ref Clock T-WST-RMSCC-REFCLK Gen5 measurement renamed to HF RMS Jitter Gen5 - Gen4 PS21 measurement is made informative - Integrated latest Sigtest Phoenix 5.0.21 for Gen5 testing - Integration of new scope noise removal algorithm from Silicon labs - Improved Pattern Validation algorithm to validate signals with noise - New Eye-Diagram plots for BaseSpec using DPOJet - New feature to config and run multiple sessions - Scope Bandwidth requirement changed to 13 GHz for Gen3 - Generation wise pass/fail status table in Report - Issue fix to support application in 2 channel SX scopes. - New TekExpress MOI Release (10.6.0) - Supports PCIe Gen5 Tx Signal Quality Test, Tx Preset Test, and Add-in Card Pulse Width Jitter Test on ATI (200GS/s) channels - Supports Gen1 to Gen4 data rates for CEM Add-In Card, Basespec TX Test Board and SRIS TX Test Board, M.2 Add-In Card and U.2 Module suites in ATI channel. - Supports Gen1 to Gen5 Ref Clock Jitter and Signal Integrity measurements - Option to choose Silicon Labs tool or DPOJet for Ref-Clock analysis - Supports new Sigtest Phoenix for CEM Gen5 measurements - Upgraded Sigtest version to 4.0.52 for Gen4 CEM and GEN5 Basespec measurements - Support Sigtest run in silent mode. (Not applicable for Sigtest v3.2.0.2) - Supports latest SigTest versions v3.2.0.3, v4.0.42, v4.0.52 and Sigtest Phoenix v5.0.10 - Option to choose compliance or data clock pattern for Gen5 Base Tx Jitter measurements - Supports automated De-Skew feature for ATI channels - Updated default trigger type to Edge - Supports saving channel settings for a session - Supports new oscilloscope models DPS75004SX and DPO71304SX - Updated the minimum bandwidth for Gen4 to 12.5 GHz - Included New Ref clock common clock tests in DPOJet - Updated schematics - Updated report with Summary table - Removed "Composite Eye Height Gen1" measurement as sigtest doesn't provide results. Release (10.5.0) - Support Gen5 Base Tx Test Board and SRIS-Tx Test Board. - Support for ATI channels on 2 stack SX oscilloscopes. - Support latest Sigtest versions v4.0.51. - Support for Deskew Tool in Gen5 Base Specification using TeKscope utility. - Separate template file for jitter and voltage measurements. - For single ended probes, added provision to select separate DeEmbed filter files. - Support for different sigtest templates in SSC On/Off condition. - DPOJET plugin for Gen5 measurements. - Removed below measurements as sigtest doesn't provide results. "Mask Hits(All Bits) Gen1" "Number Passing Eyes Gen1" "Number Failing Eyes Gen1" "Mask Hits(All Bits) Gen2" "Mask Hits(All Bits) Gen3" "Mask Hits(All Bits) Gen4" "Trans Worst Number Violation" "Non Trans Worst Number Violation" Release (10.4.5) - Tektronix Method of Implementation (MOI) for PCI Express Gen 4.0 TX CEM Test Procedure. - Support AFG31252 for 'Automated DUT Toggle' - Support Gen3 'M.2' Add-In-Card and Host. - Support latest SigTest versions v3.2.0.3, v4.0.42 and v4.0.45. - Setup DUT panel enhancement to reflect the measurement limits / SSC as per applicable Generation. - During test execution, the connection pop-up will come as per the signal source selected in configuration panel. - In configuration panel, for 16Gb/s data rate, 'Sample Rate' will take only 100Gsps. - In Compliance Mode: Now user can configure... - Number of acquisitions for Gen4-CEM in 'Acquisition panel' with range from 1 to 10 and 3 acquisitions as default. - SigTest EXE for Signal Quality and Preset test in 'Configuration panel'. - SigTest Templates for Signal Quality in 'Configuration panel'. - Link Analysis for De-Embed / Embed in 'Setup DUT pane'. - Migrated to new TekExpress Framework v4.9.0.5. Release (10.4.4) - Support 'GRL PCIe CEM Controller' to power cycle the DUT as well as toggle between different patterns. - Support CEM Specification for Gen4 System-Board / Add-In-Card as per the Test Specification Revision 4.0 (Rev0.7 July-2018) - Support Add-In Card Transmitter Pulse Width Jitter Test At 16 Gt/S - Support Base Specification for Gen4 SRIS-Tx-Test-Board - Select SigTest templates of user choice in 'User Defined Mode' - SigTest analysis will be performed in multiple instances to accelerate test analysis depending on number of cores available in the system. - Number of acquisitions for Gen4-CEM can be configured as Single / Multiple (three) via 'User Defined Mode' in 'Acquisition panel'. - P77xx probe support with P77STFLXA - Migrated to New TekExpress Framework v4.5.0 Release (10.3.4) - Support Tektronix oscilloscopes with Windows-10 OS compatible for TekExpress PCI Express - Support new SigTest v3.2.0.1 compatible for Windows-10 OS for PCIE Gen1, Gen2 and Gen3 Release (10.3.3) - Supports P75xx, P76xx, and P77xx TriMode probes with respective probe tips Release (10.3.2) - Supports PCIE4.0 Base Spec with SigTest v4.0 - Migrated to New TekExpress Framework v4.2.10 - Migrated to Windows 64-Bit platform from 32-Bit - Included Gen1,2,3,4 with Test Names for quick access - Improved Switch and DUT toggle mechanism - Deploys SigTest v3.2.0 and v4.0 to be used for PCIE3.0 and PCIE4.0 respectively - Supports Only Command Line Interface (CLI) for SigTest - Supports only SCPI commands to remotely communicate with the TekExpress application Release (10.2.1) - ReadMe update Release (10.2.0) - RF Switch support to test the x12 and x16 lanes using Keithley and Gigatronics switches respectively - Supports Base specification Gen3 - 3.0 Tx Test Board DUT Type - Supports P75xx, P76xx, and P77xx TriMode probes - Simple push button, enabling the users to manually toggle PCIe presets from AWG/AFG - Clock lane support in differential mode for the System-Board device type of CEM specification and Host device type of U.2 (SFF-8639) specification - Updated mask co-ordinates for the Add-in-card device type of CEM specification, of Gen2 in DLL mode Release (10.1.0) - SX model Oscilloscopes Support with new firmware v10.3. - Support U.2 (SFF-8639) specification, provided the machine has SigTest v3.2.0 with U.2 templates - Trigger type support for Gen3 (Auto/Width/Edge) - Support new SigTest v3.2.0 template with pattern check - TekExpress setup files in-line with PCI-SIG Compliance Workshop - Faster test execution time with improved Autoset Release (2.2.1) - Support new SigTest v3.2.0 template with pattern check Release (2.2.0) - Support for PDF reports - Minimize button for TekExpress - Ability to pause TekExpress after Run - Optional presets return from Gen3 -> Gen1 - Added new setup files in DPOJET PCIE - MOI updates & corrections in DPOJET PCIE - Performance improvements for Autoset and Decoder - Customer feedback & sightings ================================================================================= 2. Before you click "RUN" a) Ensure that all the required instruments are properly warmed up, Signal Path Compensation (SPC) is performed, followed by calibration and cable deskew. b) Steps for network drive connection b.1) Background information: After you first launch TekExpress, it creates the following folders on your computer: “\My Documents\My TekExpress” NOTE. Ensure that the “My TekExpress” folder has Full read and write access. NOTE. If a user with a different Windows login ID launches TekExpress, a new folder is created under “My documents” of new user. “\My Documents\My TekExpress\PCI Express” “\My Documents\My TekExpress\PCI Express\Untitled Session”, this sub-folder is created every time the “TekExpress PCI Express.exe” is launched and this sub-folder is deleted when you exit application. CAUTION: Each session has multiple files associated with it. Do not modify any of the session files and/or folders as this may result in loss of data or corrupted session files. The “My TekExpress” folder mentioned above is created as a shared folder with share name, as ’s My TekExpress ================================================================================= 3. TekExpress PCI Express created changes on your system. After first launch of "TekExpress PCI Express.exe" following changes take place in your computer. a) "My TekExpress" folder is created under "My Documents" folder of current user NOTE: If a user with new login ID launches "TekExpress PCI Express.exe", "My TekExpress" folder is created under "My Documents" of the new user. b) "PCI Express" folder is created under "My TekExpress" folder c) "Untitled Session" folder is created under "PCI Express" folder, note that every time "TekExpress PCI Express.exe" is launched "Untitled Session" folder is created under "PCI Express" folder and will be deleted after proper termination of application. d) If user saves a session in TekExpress PCI Express all session files are saved under "PCI Express" folder. Note that each session has multiple files associated with it and do not tamper with any of the session file(s) and/or folder(s) this may result in loss of data or corrupted session files. ================================================================================== 4. Supported Tests PCI Express Compliance supports All transmitter tests for Physical Layer Solution in this version of the application. ================================================================================== 5. Supported list of equipment, accessories and software- Oscilloscopes: - MSO70604 3, DPO/MSO70604C (Gen1 testing only) - MSO708043, DPO/MSO70804C (Gen1 and Gen2 testing) - MSO712543, DPO/MSO71254C (Gen1, Gen2, and Gen3 testing only) - MSO716043, DPO/MSO71604C (Gen1, Gen2, and Gen3 testing) - MSO720043, DPO/MSO72004C (Gen1, Gen2, and Gen3 testing) - DPO/MSO72304DX (Gen1, Gen2, and Gen3 testing) - DPO/DSA72504D ( Gen1, Gen2, Gen3, and Gen4 testing) - DPO/DSA73304D (all generation testing) - DPO/MSO72304DX (Gen1, Gen2, and Gen3 testing) - DPO/MSO72504DX (all generation testing) - DPO/MSO73304DX (Gen1, Gen2, Gen3, and Gen4 testing) - DPO71304SX (Gen1, Gen2, and Gen3 testing) - DPO71604SX (Gen1, Gen2, and Gen3 testing) - DPO72304SX (Gen1, Gen2, and Gen3 testing) - DPO73304SX All Generation Testing - DPO75002SX [Standalone or 2 Stack] All Generation Testing - DPO75902SX [Standalone or 2 Stack] All Generation Testing - DPO77002SX [Standalone or 2 Stack] All Generation Testing Power Cycle the DUT: - GRL PCIE34 PHY Test Controller with part number: GRL-PCIE34-P1 - Contact GRL at support@graniteriverlabs.com for support and quote@graniteriverlabs.com to request for a quote. Automated DUT Control: - AFG3252/AFG3252C/AFG31252 - AWG7102, AWG7122B, AWG7122C, AWG5014C, AWG5014B, AWG5002B, AWG5002C, AWG7082C, AWG70001A, AWG70002A - GRL PCIE34 PHY Test Controller with part number: GRL-PCIE34-P1 - Contact GRL at support@graniteriverlabs.com for support and quote@graniteriverlabs.com to request for a quote. - National Instruments USB-6501 digital I/O device with part number: 779205-01 RF Switch: - Keithley System S46T RF Microwave Switch Systems for x12 PCIe - Gigatronics RF Switch 26GHz (8902-L-48TS26) for x16 PCIe - MiniCircuit ZTM6SP4T40 for x12 PCIe - MiniCircuit ZTM28SP6T40 for x16 PCIe Software: - TekScope Firmware: Win-10 Scopes Ver :10.12.0 - DPOJET: Ver. 10.4.0.5 and above (Win 10) - PAMJet: Ver 10.9.0.225 and above - DPOJET PCI/PCIE: Ver. 10.7.0 - SigTest Versions - Sigtest Phoenix 5.1.04: PCIe Gen5 CEM Spec - Sigtest v4.0.52: PCIe Gen4 CEM Spec, Gen4 and Gen5 Base Spec - Sigtest v4.0.42: PCIe Gen3 Base spec - Sigtest v3.2.0.3: PCIe Gen3 CEM Spec - Intel CJT v5.0.2 - Skyworks clock jitter tool v7.0 Differential Probes: - P75xx, P76xx, and P77xx TriMode probes with respective tip in differential mode. ================================================================================== 6. Switch Matrix a) By default, when Switch Matrix setup is called, a default configuration will be loaded as per Device Type. b) The default configuration file will always be loaded assuming KeithlyS46T RF switch is being used. The files will support: x6 lanes for System-Board device type of CEM specification x12 lanes for Add-In-Card device type of CEM specification x4 lanes for Host device type of U.2 (SFF-8639) specification x4 lanes for Module device type of U.2 (SFF-8639) specification x12 lanes for TX Test Board device type of Base specification c) For Gigatronics switch: Use 'Auto Detect' in the 'Switch Setup - configurations' and continue. d) It is mandatory to RENAME the lanes in-line with application lane naming for TekExpress PCI Express. Ensure the lanes are Renamed as: Lane0, Lane01, Lane02, Lane03, Lane04, Lane05, Lane06, Lane07, Lane08, Lane09, Lane10, Lane11, Lane12, Lane13, Lane14, Lane15. Saving the configuration file will retain the lane names for next use. e) Switch Matrix will not work and not supported for multilane testing using RF switch for Gen4-CEM-Specification. ================================================================================== 7. Known Limitations 7.1 Installer related limitation a) Installation of TekExpress and other software packages are installed on C: drive only. b) The available free space on C: drive must be minimum 2.2GB. c) The TekExpress PCIe Installer does not install PAMJet application. User needs to install the right PAMJet software and ensure the option key is enabled. d) In order to use the NI USB 6501 CBB Controller for DUT automation, user needs to install NI-DAQmx software package. Refer online help document for more detalis. 7.2 TekExpress application related limitations - Tests will be started only when all the instruments are available. - During test execution if user pauses the execution and if user does any changes in instrument setup then it is important that user restores the instruments settings to same state before clicking "Continue". - Need to have sufficient hard disc space (Minimum of 1GB) to save the session information. - On a 25GHz/33GHz oscilloscope, if the Signal amplitude is more than 1.2V and if you are using single ended probe, then the waveform will be clipped. In such cases, use the recommended differential probe. - Recalling a session saved from the previous releases (v1.0.0 till v10.4.4) is not recommended. - The option in preference panel to 'Auto close warning and information pop-ups' is not applicable to 'Signal Validation' pop-ups. - Test only with ONE lane at time for CEM-Specification-System Board, when using Differential / P75xx, P76xx, and P77xx Probes. - Test only with ONE lane at time for Gen4-Base-Specification-TX Test Board with Non-ATI channels. - Test only with ONE lane at time for Gen3/Gen4-Base-Specification-TX Test Board with Non-ATI channel, and selecting de-embedding filter. - The issue of intermittent behaviour of pattern validation under signal quality test and the non-availability of pattern decoder is known wrt Gen4-CEM and will be addressed in future releases. - Basespec Gen5 version data rate testing is only supported on ATI channels. - System-Board Gen2, Gen3 and Gen4, U.2 (SFF-8639) Host Gen3 and M.2 Host Gen3 data rate testing is only supported on Non-ATI channels. - User requires PCE5 option key for Ref-Clock testing of all generations. - For BaseSpec Gen5 only volatge measurements will be run on the selected presets in DUT panel. BaseSpec Gen5 TX Jitter measurements are run only on a single compliance or Data Clock pattern based on user selection. However, all the selected presets in the DUT panel will be acquired even if only Jitter measurements are selected. - Silent mode option for sigtest is not applicable for 3.2.0.3 Sigtest Version. - Sigtest phoenix v5.0.21 executes in silent mode for Gen5 CEM by default, hence the errors/warning are not visible in the UI. - User cannot select the subset of preset tests for Gen5 CEM since it is not supported by Sigtest Phoenix. - Eye diagram plots of Gen5 CEM are not available in the TekExpress report since Sigtest does not provide the support for plots in command line. - Do not use channel-1 of scope to capture clock signal for CEM-Specification-System Board, U.2 (SFF-8639) Host and M.2 Host deveice type testing. - If automated Deskew is selected, clicking "No" in the Deskew pop up will still proceed with deskew procedure. As a work around, uncheck Deskew checkbox and set deskew values manually. - Clicking the "Refresh Sources" button in the acquisition panel during execution may lead the software become unresponsive. - Intel CJT tool installation requires internet connection. ================================================================================== 8. GRL PCE34 PHY Test Controller 8.1 How to detect GRL Controller on your Oscilloscope If the Oscilloscope is Win10 OS based, when the USB interface of GRL controller is plugged-in the drivers will be loaded automatically and you can detect the instrument using TekExpress Instrument bench by selecting 'Serial' interface check box. For Win7 OS based Oscilloscope the driver must be manually installed one time and similar procedure must be followed to detect the instrument. If this is not coming up in TekExpress instrument bench to TekVisa Instrument Manager and select 'Serial' as ON and then click on update then. The TekExpress PCI Express can detect the GRL controller when the instrument returns the string as “IDN GRL PCIe CEM Controller version 1.4 Release 1” sometimes the controller returns only partial string in response to "IDN?" from TekExpress Instrument bench, then refresh twice. Sometimes the GRL controller may return error in response to "IDN?" - plug-out the USB interface of GRL controller and plug-in to another USB port on the Oscilloscope, if the problem persists... - Restart the Oscilloscope. When TekScope is launched, launch TekExpress and refresh the instrument bench. 8.2 GRL Controller for legacy Gen3 CBB fixture Use the ATX power adaptor cable from the SMPS power adaptor to power cycle the Add-In-Card DUTs Connect the SMA-SMP cable from the GRL controller to RX Lane + and - respectively 8.3 GRL Controller for Gen4 CBB fixture Connect the cables from GRL Controller to Gen4 CBB Rev2.0 respectively Blue - J76 - Toggle Automation Input, check the ^ mark on the pin and this should go the Anode pin side Red - J101 - Reset Automation Input, check the ^ mark on the pin and this should go the Anode pin side Green - J102 - Power Automation Input, check the ^ mark on the pin and this should go the Anode pin side Connect the SMA-SMP cable from the GRL controller to RX Lane + and - respectively 8.4 GRL Controller for Gen3 / Gen4 CLB fixture Connect the SMA-SMP cable from the GRL controller to RX Lane + and - respectively 8.5 Schematic update with GRL Controller Only Gen4 schematics for Add-In-Card and System-Board are updated with GRL controller For Signal Quality Tests, Preset Tests and PWJ Test (Only for Add-In-Card) ==================================================================================